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 BF991
N-channel dual-gate MOS-FET
Rev. 03 -- 20 November 2007 Product data sheet
IMPORTANT NOTICE
Dear customer, As from October 1st, 2006 Philips Semiconductors has a new trade name - NXP Semiconductors, which will be used in future data sheets together with new contact details. In data sheets where the previous Philips references remain, please use the new links as shown below. http://www.philips.semiconductors.com use http://www.nxp.com http://www.semiconductors.philips.com use http://www.nxp.com (Internet) sales.addresses@www.semiconductors.philips.com use salesaddresses@nxp.com (email) The copyright notice at the bottom of each page (or elsewhere in the document, depending on the version) - (c) Koninklijke Philips Electronics N.V. (year). All rights reserved is replaced with: - (c) NXP B.V. (year). All rights reserved. If you have any questions related to the data sheet, please contact our nearest sales office via e-mail or phone (details via salesaddresses@nxp.com). Thank you for your cooperation and understanding, NXP Semiconductors
NXP Semiconductors
Product specification
N-channel dual-gate MOS-FET
FEATURES * Protected against excessive input voltage surges by integrated back-to-back diodes between gates and source. APPLICATIONS * VHF applications such as: - VHF television tuners and FM tuners - Professional communication equipment. PINNING PIN 1 2 3 4 SYMBOL s, b d g2 g1 source drain gate 2 gate 1
Top view Marking code: %MA.
MAM039 handbook, halfpage
BF991
DESCRIPTION Depletion type field-effect transistor in a plastic SOT143 microminiature package with interconnected source and substrate.
4
3 g2 g1
d
DESCRIPTION
1
2 s,b
Fig.1 Simplified outline (SOT143) and symbol.
QUICK REFERENCE DATA SYMBOL VDS ID Ptot Tj Y fs Cig1-s Crs F PARAMETER drain-source voltage drain current total power dissipation junction temperature transfer admittance feedback capacitance noise figure f = 1 kHz; ID = 10 mA; VDS = 10 V; VG2-S = 4 V up to Tamb = 60 C CONDITIONS - - - - 14 TYP. MAX. 20 20 200 150 - - - 2 UNIT V mA mW C mS pF fF dB
input capacitance at gate 1 f = 1 MHz; ID = 10 mA; VDS = 10 V; VG2-S = 4 V 2.1 f = 1 MHz; ID = 10 mA; VDS = 10 V; VG2-S = 4 V 20 f = 200 MHz; GS = 2 mS; BS = BSopt; ID = 10 mA; VDS = 10 V; VG2-S = 4 V 1
Rev. 03 - 20 November 2007
2 of 7
NXP Semiconductors
Product specification
N-channel dual-gate MOS-FET
LIMITING VALUES In according with the Absolute Maximum Rating System (IEC 134). SYMBOL VDS ID ID(AV) IG1-S IG2-S Ptot Tstg Tj PARAMETER drain-source voltage drain current (DC) average drain current gate 1-source current gate 2-source current total power dissipation storage temperature junction temperature up to Tamb = 60 C; note 1 CONDITIONS - - - - - - -65 - MIN. MAX. 20 20 20 10 10 200 +150 150
BF991
UNIT V mA mA mA mA mW C C
THERMAL CHARACTERISTICS SYMBOL Rth j-a PARAMETER thermal resistance from junction to ambient CONDITIONS in free air; note 1 VALUE 460 UNIT K/W
Note to the Limiting values and the Thermal characteristics 1. Device mounted on a ceramic substrate of 8 x 10 x 0.7 mm.
handbook, halfpage
200
MGE792
Ptot (mW)
100
0 0 100 Tamb (C) 200
Fig.2 Power derating curve.
Rev. 03 - 20 November 2007
3 of 7
NXP Semiconductors
Product specification
N-channel dual-gate MOS-FET
STATIC CHARACTERISTICS Tj = 25 C unless otherwise specified. SYMBOL IG1-SS IG2-SS IDSS V(BR)G1-SS V(BR)G2-SS V(P)G1-S V(P)G2-S PARAMETER gate 1 cut-off current gate 2 cut-off current drain current CONDITIONS VG1-S = 5 V; VG2-S = VDS = 0 VG2-S = 5 V; VG1-S = VDS = 0 VDS = 10 V; VG1-S = 0; VG2-S = 4 V MIN. - - 4 6 6 - -
BF991
MAX. 50 50 25 20 20 -2.5 -2.5
UNIT nA nA mA V V V V
gate 1-source breakdown voltage IG1-SS = 10 mA; VG2-S = VDS = 0 gate 2-source breakdown voltage IG2-SS = 10 mA; VG1-S = VDS = 0 gate 1-source cut-off voltage gate 2-source cut-off voltage ID = 20 A; VDS = 10 V; VG2-S = 4 V ID = 20 A; VDS = 10 V; VG1-S = 0
DYNAMIC CHARACTERISTICS Measuring conditions (common source): ID = 10 mA; VDS = 10 V; VG2-S = 4 V; Tamb = 25 C. SYMBOL Y fs Cig1-s Cig2-s Crs Cos F Gtr PARAMETER transfer admittance input capacitance at gate 1 input capacitance at gate 2 feedback capacitance output capacitance noise figure transducer gain; note 1 f = 1 kHz f = 1 MHz f = 1 MHz f = 1 MHz f = 1 MHz f = 100 MHz; GS = 1 mS; BS = BSopt f = 200 MHz; GS = 2 mS; BS = BSopt f = 100 MHz; GS = 1 mS; BS = BSopt; GL = 0.5 mS; BL = BLopt f = 200 MHz; GS = 2 mS; BS = BSopt; GL = 0.5 mS; BL = BLopt Note 1. Crystal mounted in a SOT103 package. CONDITIONS MIN. 10 - - - - - - - - TYP. 14 2.1 1 20 1.1 0.7 1 29 26 MAX. - - - - - 1.7 2 - - UNIT mS pF pF fF pF dB dB dB dB
Rev. 03 - 20 November 2007
4 of 7
NXP Semiconductors
Product specification
N-channel dual-gate MOS-FET
PACKAGE OUTLINE
BF991
handbook, full pagewidth
0.75 0.60
0.150 0.090 4 0.1 max 10 max
o
3.0 2.8 1.9 3
B A 0.2 M A B
10 max
o
1.4 1.2
2.5 max
1 1.1 max
o
2 0.1 M A B
30 max
0.88
0 0.1 1.7
0.48
0 0.1
MBC845
TOP VIEW
Dimensions in mm. See also Soldering recommendations.
Fig.3 SOT143.
Rev. 03 - 20 November 2007
5 of 7
NXP Semiconductors
BF991
N-channel dual-gate MOS-FET
Legal information
Data sheet status
Document status[1][2] Objective [short] data sheet Preliminary [short] data sheet Product [short] data sheet
[1] [2] [3]
Product status[3] Development Qualification Production
Definition This document contains data from the objective specification for product development. This document contains data from the preliminary specification. This document contains the product specification.
Please consult the most recently issued document before initiating or completing a design. The term `short data sheet' is explained in section "Definitions". The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com.
Definitions
Draft -- The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet -- A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail.
malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. Applications -- Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values -- Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale -- NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license -- Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights.
Disclaimers
General -- Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes -- NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use -- NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or
Trademarks
Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners.
Contact information
For additional information, please visit: http://www.nxp.com For sales office addresses, send an email to: salesaddresses@nxp.com
Rev. 03 - 20 November 2007
6 of 7
NXP Semiconductors
BF991
N-channel dual-gate MOS-FET
Revision history
Revision history Document ID BF991_N_3 Modifications: BF991_2 BF991_SF_1 Release date 20071120 Data sheet status Product data sheet Product specification Change notice Supersedes BF991_2 BF991_SF_1 -
*
Fig. 1 on page 2; Figure note changed
19910401
Please be aware that important notices concerning this document and the product(s) described herein, have been included in section `Legal information'.
(c) NXP B.V. 2007.
All rights reserved.
For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 20 November 2007 Document identifier: BF991_N_3


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